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A Novel BIST Scheme Using Test Vectors Applied by Circuit-under-Test Itself

机译:一种新的BIST方案,使用电路欠测试本身施加的测试向量

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A new built-in-self-test scheme, referred to as Test Vectors Applied by Circuit-under-Test (TVAC), is proposed in this paper.  As the point of view of the paper, Circuit-under-Test (CUT) is no longer only regarded as a test object, but also a kind of available resources. By feedback connecting some of the CUT’s interior nodes to the input terminals, the method can generate a test set with low area overhead, short test application time, and enable at-speed testing.  A “feedback grouping” search algorithm is presented for a given CUT and its test set.  The experimental results on ISCAS85 benchmark circuits and MinTest test sets demonstrate that the proposed scheme not only can achieve almost 100% single stuck-at fault coverage, but also has an average 54.1% reduction in test pattern length compared with LFSR reseeding approaches, and an average 6.1% extra area overhead over the area of the largest five CUTs.  The percentage of extra area overhead is not sensitive to the size of the CUT.
机译:本文提出了一种新的内置自检方案,称为电路欠型测试(TVAC)的测试向量。作为纸张的角度来看,电路欠测试(剪切)不再被视为测试对象,而是一种可用资源。通过将一些切割的内部节点连接到输入端子,该方法可以生成具有低区域开销,短测试施用时间的测试集,并启用速度测试。为给定的剪切及其测试集提供了“反馈分组”搜索算法。 ISCAS85基准电路和MINTEST测试集的实验结果表明,该方案不仅可以实现几乎100%的单一卡在故障覆盖率,而且与LFSR重定相对的方法相比,测试图案长度的平均降低了54.1%。平均最大五个削减面积为6.1%额外的区域开销。额外区域开销的百分比对切割的大小不敏感。

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