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The electromigration damage response time and implications for DC and pulsed characterizations

机译:DC和脉冲表征的电迁移损伤响应时间和含义

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A measurement interference for highly accelerated electromigration stress tests is identified. Measurements of the median-time-to-failure, t/sub 50/ for DC and for pulsed current stress as a function of pulse repetition frequency, reveal that highly accelerated stress tests may overestimate metallization reliability if t/sub 50/ is comparable with the response time of the vacancy concentration. Techniques necessary to make reliable wafer-level t/sub 50/ measurements are described.
机译:鉴定了对高加速电迁移应力测试的测量干扰。失败的中值T / SUM 50 /用于DC的测量和作为脉冲重复频率的函数的脉冲电流应力,显示,如果T / SUS 50 /与其相当,高度加速的应力测试可能会高估金属化可靠性。空位浓度的响应时间。描述了制备可靠晶片级T / SUM 50 /测量所需的技术。

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