A 100 nm emitter transistor fabricated with direct EB writing for high-speed bipolar LSIs

摘要

In recent years, the performance of bipolar transistors has been improved through the use of down-scaling and polysilicon base technologies. However. scaling1 down to under a quarter of a micron has been found to be very difficult because of the need for precise control of emitter size and junction depth. In response to this problem, a now transistor structure is considered to study the limitations of down-scaling as well as to obtain a better understanding of the possibilities of future bipolar transistors. This transistor has a minimum emitter width of 100nm, and was fabricated using electron-beam (EB) lithography and polysilicon base/emitter technologies, as shown in Fig. 1. These technologies will be essential for future transistors. Since the emitter width accuracy was ??0. 05 ??m(3 ??) for the transistor (1), the effect of an ultra-narrow emitter on transistor characteristics was examined.