首页> 外文会议>Design Automation, 1995. DAC '95. 32nd Conference on >Symbolic Fault Simulation for Sequential Circuits and the Multiple Observation Time Test Strategy
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Symbolic Fault Simulation for Sequential Circuits and the Multiple Observation Time Test Strategy

机译:时序电路的符号故障仿真和多重观测时间测试策略

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Fault simulation for synchronous sequential circuits is a very time-consuming task. The complexity of the task increases if there is no information about the initial state of the circuit. In this case an unknown initial state is assumed which is usually handled by introducing a three-valued logic. As it is well-known fault simulation based on this logic only determines a lower bound of the fault coverage. Recently it has been shown that fault simulation based on the multiple observation time test strategy can improve the accuracy of the fault coverage. In this paper we describe how this strategy can be successfully implemented based on Ordered Binary Decision Diagrams. Our experiments demonstrate the efficiency of the fault simulation procedure developed.
机译:同步时序电路的故障仿真是一项非常耗时的任务。如果没有有关电路初始状态的信息,则任务的复杂性会增加。在这种情况下,假定未知的初始状态,通常通过引入三值逻辑来处理。众所周知,基于此逻辑的故障模拟只能确定故障范围的下限。近来已经表明,基于多次观察时间测试策略的故障仿真可以提高故障覆盖率的准确性。在本文中,我们描述了如何基于有序二元决策图成功地实施该策略。我们的实验证明了开发的故障仿真程序的效率。

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