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Fabrication and characterization of e-beam defined MOSFETs with sub-micrometer gate lengths

机译:具有亚微米栅极长度的电子束定义MOSFET的制造和表征

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Well-behaved n-channel MOSFETS with polysilicon gate lengths as small as 0.5µm have been fabricated using E-Beam direct slice writing, anisotropic plasma etching and ion implantation techniques. Implant profiles were optimized using SUPREM to reduce short channel effects such as punch-through, drain modulation and subthreshold leakage. Gate overlap of the diode regions was minimized by implanting arsenic through a conformal oxide layer, thereby enhancing the effective channel length relative to patterned dimensions and reducing Miller effect capacitance. Fabricated MOSFETS with gate lengths as small as 0.5µm exhibited good off-state behavior with drain voltages as high as 5 volts. Measured data were fitted within 5% to both a modified SPICE model and a short channel charge-sharing model.
机译:使用电子束直接切片写入,各向异性等离子刻蚀和离子注入技术已经制造出性能良好,多晶硅栅极长度小至0.5μm的n沟道MOSFET。使用SUPREM对植入物轮廓进行了优化,以减少短通道效应,例如穿通,漏极调制和亚阈值泄漏。通过在共形氧化物层中注入砷,可以最大程度地减少二极管区域的栅极重叠,从而相对于图案化尺寸增加有效沟道长度,并降低米勒效应电容。栅极长度小至0.5μm的制造MOSFET在漏极电压高达5伏时表现出良好的截止状态。修改后的SPICE模型和短通道电荷共享模型均将测量数据拟合在5%以内。

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