A monolithically-integrated chip-to-chip optical link in bulk CMOS

摘要

A silicon-photonic link is monolithically-integrated in a bulk CMOS process for the first time. Deep-trench isolation enables polySi waveguide integration. PolySi resonant detectors remove the need for Ge integration. Split-diode design enables half-rate receivers, mitigating transistor speed limitations. An on-chip feedback loop locks the resonant defect detector to the laser wavelength, combating thermal upset. The 5m optical link achieves 5Gb/s at 3pJ/b electrical and 13pJ/b optical energy, in 0.18µm (100ps FO4) bulk CMOS memory periphery process.