FIRST EXPERIENCES WITH CHIP DEVELOPMENT ON THE COMMERCIAL STM 65 NM PROCESS

摘要

Currently Astrium GmbH is involved in the HighPerformance Data Processor (HPDP) developmentprogramme targeting the implementation of thecommercially available reconfigurable array processorIP (XPP from the company PACT XPP Technologies)in a radiation hardened technology.In the current complementary development phase, itis planned to prototype the HPDP chip in commercialSTM 65 nm technology. The idea behind thisprototyping approach is not only to verify thefunctionality of the HPDP chip design, but also to getaccustomed to the chip development flow of the futureEuropean deep sub-micron process. The prototyping isbeing carried out within the ESA Greek IndustryIncentive Scheme by Integrated Systems Development(ISD). It is estimated that the HPDP prototype chipwill be available in Q3 of 2013.As the STM 65nm process is planned to be madeavailable as a radiation hardened process in the nearfuture, the current exercise enables Astrium to gainexperience with using this technology, to getaccustomed to the STM development flow, to identifyand avoid any hurdles in the future planned radiationhardened HPDP chip development. The HPDP chip isforeseen by ESA as a candidate for the firstmanufacturing run of the radiation hardened STM65nm process. This exercise also assists in identifyingany shortcomings of the proposed design methodologyfor the STM 65nm process.