首页> 外文会议>Electronic Components and Technology Conference, 1991. Proceedings., 41st >Electrical characteristics of 25 mil pitch JEDEC PQFP surface mountlead frames for multichip modules
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Electrical characteristics of 25 mil pitch JEDEC PQFP surface mountlead frames for multichip modules

机译:25密耳JEDEC PQFP表面贴装的电气特性多芯片模块的引线框

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The electrical characteristics of the leadframe used to form theJEDEC standard 25-mil-pitch PQFP (POLYHIC quad flat pack) outlinepackage are examined. The characteristic impedance is computed and threemodels of the leadframe pins are created for each ground configurationcase for both isolated and coupled pairs of pins. Crosstalk betweenadjacent pins has been simulated and measured as a function of signalrisetime. The risetime degradation of signals transmitted through theleadframe pins has been simulated and measured. These data have beenused to estimate a conservative upper limit for clock and data ratecapability of this leadframe. The POLYHIC PQFP outline package is shownto be a multi-gigabit-per-second package
机译:用于形成引线框的引线框的电气特性 JEDEC标准25密耳PQFP(POLYHIC四方扁平包装)外形 包装被检查。计算特性阻抗并计算三个 针对每种接地配置创建引线框引脚的模型 隔离和耦合引脚对的外壳。之间的串扰 相邻引脚已根据信号进行仿真和测量 上升时间。通过天线传输的信号的上升时间下降 引线框引脚已经过仿真和测量。这些数据已经 用于估计时钟和数据速率的保守上限 该引线框架的功能。显示了POLYHIC PQFP轮廓包 成为每秒数千兆的数据包

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