首页> 外文会议>IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits >Reducing dynamic on-resistance of p-GaN gate HEMTs using dual field plate configurations
【24h】

Reducing dynamic on-resistance of p-GaN gate HEMTs using dual field plate configurations

机译:使用双场板配置降低p-GaN栅极HEMT的动态导通电阻

获取原文

摘要

The dynamic ON-resistance (Ron) of p-GaN HEMTs was reduced using the dual field plate (FP) structure combined with the source field plate (S-FP) and gate field plate (G-FP). The electric field redistribution at the gate edge reduces the electron trapping during the high voltage blocking, avoiding the Ron increase after the device switching on. The devices with the dual FPs attained the breakdown voltage over 600 V, and the Ron increased only 50% after 200 V blocking, outperforming the devices with single FP or without FPs. Moreover, a plasma surface treatment process was introduced to further improve dynamic Ron performance, which is a promising method to alleviate the current collapse effect. The electric field distribution was also simulated using TCAD to support the experimental results. The results support the dual field plate design a useful structure for high-voltage GaN based HEMTs.
机译:使用双场板(FP)结构与源极场板(S-FP)和栅极场板(G-FP)相结合,可以降低p-GaN HEMT的动态导通电阻(Ron)。栅极边缘处的电场重新分布减少了高压阻断期间的电子俘获,避免了器件开启后Ron增大。具有双FP的器件达到600 V以上的击穿电压,并且在200 V阻断后Ron仅增加了50%,胜过具有单个FP或不带FP的器件。此外,引入等离子体表面处理工艺以进一步改善动态Ron性能,这是减轻电流崩塌效应的有前途的方法。还使用TCAD模拟了电场分布,以支持实验结果。结果支持双场板设计,这是用于基于GaN的高压HEMT的有用结构。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号