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Dv/dt Induced Failure and Improvement of Power Superjunction MOSFET

机译:Dv / dt引起的故障和功率超结MOSFET的改进

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The failure Mechanism of Power Superjunction MOSFET (SJ-MOS) under high dv/dt is analyzed. Simulations show that the design of P/N pillars in the drift region of SJ-MOS is significant to the dv/dt induced failure. By optimizing the P/N pillars' width, doping concentration and doping distribution, the voltage and current overshoots in the switching process can be decreased, so as to improve the reliability of SJ-MOS.
机译:分析了高dv / dt条件下功率超结MOSFET(SJ-MOS)的失效机理。仿真结果表明,SJ-MOS漂移区中P / N柱的设计对dv / dt引起的失效具有重要意义。通过优化P / N柱的宽度,掺杂浓度和掺杂分布,可以减少开关过程中的电压和电流过冲,从而提高了SJ-MOS的可靠性。

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