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Leakage Reduction, Variation Compensation Using Partition-based Tunable Body-Biasing Techniques

机译:泄漏减少,使用基于分区的可调谐体偏置技术的变化补偿

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As fabrication technology progresses, several new challenges follow. Among them, the most noticeable two are process variations and leakage current of the circuit. To tackle these two problems, an effective way is to use body biasing technique. In substance, using RBB technique can minimize leakage current but increase the delay of a gate. FBB technique decreases the delay but increases leakage current In previous works, a single body biasing is applied to whole circuit In a slow circuit, since the FBB is applied to whole circuit, the leakage current increases dramatically. In a fast circuit, RBB is applied to decrease the leakage current However, without violating the timing specification, the value of body biasing is restricted by the critical paths, and the saving of leakage current is limited. In this paper, we propose a design flow to partition the circuit into subcircuits so that each subcircuit can be applied its individual RBB or FBB to reduce the leakage current and cope with process variations. In the experimental result, our method is able to save leakage current from 41% to 46% as compared with design without body biasing technique. Under process variations, our method can save 40% to 49% leakage on fast circuits and 15% to 32% on slow circuits.
机译:随着制造技术的进展,遵循几个新的挑战。其中,最引人注目的两个是电路的过程变化和漏电流。为了解决这两个问题,有效的方法是使用身体偏置技术。在实质上,使用RBB技术可以最小化漏电流,但增加了栅极的延迟。 FBB技术降低了延迟,但是在先前作品中增加了漏电流,在慢速电路中将单个体偏置应用于整个电路,因为FBB被施加到整个电路,漏电流急剧增加。在快速电路中,施加RBB以降低漏电流,然而,在不违反定时规范的情况下,身体偏置的值受关键路径的限制,并且泄漏电流的节省有限。在本文中,我们提出了一种设计流程,将电路分配到子通道,使得每个子电路可以应用其单独的RBB或FBB以减少漏电流并应对过程变化。在实验结果中,与没有体偏置技术的设计相比,我们的方法能够将漏电流从41%节省41%至46%。在流程变化下,我们的方法可以节省40%至49%的快速电路泄漏,慢速电路上的15%至32%。

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