Estimation of Power and Delay of CMOS Phase Detector and Phase-Frequency Detector Using Nano Dimensional MOS Transistor

摘要

In this paper the design of phase detector circuit using nano dimensional transistor has been presented .The conventional circuit of phase-frequency detection has been realized and presented. The circuit schematics are simulated with the help of Tanner SPICE software. The power dissipation, transistor delay, product of power and delay of the phase detector circuit has been estimated at 16 nm and 22 nm gate length of transistor. Power and speed performance analysis is carried out varying the value of VDD in the range 0.5 V - 1.2 V and aspect ratio of PMOS to NMOS from 1 to 5 . Moreover, the power, gate delay and PDP of the phase-frequency detector has been stated at 150 nm channel length .The results are pleasing context to the design of Very Large Scale Integrated (VLSI) circuit having high speed and low power dissipation.