Sub-Sampling PLL For Millimeter Wave Applications: An Overview

摘要

The sub-sampling PLL utilizes a PD that subsamples the high frequency VCO output with the reference clock. The PD and CP noise in this PLL is greatly attenuated by the high phase detection gain due to the high VCO dv/dt slew rate. It is now a proven PLL architecture and widely used for achieving low phase noise or integrated jitter yet with low power consumption. This article reviews the development of the sub-sampling PLL techniques and their usage in the millimeter wave applications.