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Simple technique for prediction of breakdown voltage of ultrathin gate insulator under ESD testing

机译:ESD测试中预测超薄栅极绝缘子击穿电压的简单技术

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In this study, simple ramped voltage TLP (RV-TLP) measurement was utilized to predict breakdown voltage (BV) and number of pulses to breakdown (N) under ESD testing. The proposed prediction method does not require lengthy DC-TDDB measurements but instead utilizes quick Ramped Voltage (RV) stress measurements to calculate a voltage to breakdown (BV) in the ESD timeframe. From voltage ramping rate dependence of Q and breakdown current (J), the power law between Q and J was obtained. By using this Q-J correlation, we succeeded the predictions of BV and N analytically, and these values correspond to that for conventional constant-voltage TLP measurement. Furthermore, according to the evaluation of Q, anode-hole-injection (AHI) model is still adaptable for the breakdown under nanosecond pulse ESD testing.
机译:在该研究中,利用简单的斜坡电压TLP(RV-TLP)测量来预测ESD测试下的击穿电压(BV)和脉冲的脉冲数。所提出的预测方法不需要冗长的DC-TDDB测量,而是利用快速斜坡电压(RV)应力测量来计算ESD时隙中的击穿(BV)的电压。从Q和击穿电流(j)的电压斜坡率依赖性,获得Q和j之间的电力律。通过使用该Q-J相关性,我们通过分析地成功地预测了BV和N,并且这些值对应于传统恒压TLP测量。此外,根据Q的评估,阳极 - 空穴注入(AHI)模型仍适用于纳秒脉冲ESD测试下的击穿。

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