On-Wafer high voltage discrete device capacitance characterization for parameter extraction of physically scalable electro-thermal SPICE models

摘要

Accurate characterization of discrete devices such as SuperFET(r), IGBTs and diodes is critical not only for the fine tuning and improvement of production processes, but also for the precise parameter extraction of advanced SPICE models. Among the many measureable parameters, the capacitive properties of a discrete device are of particular importance. In performing on-wafer high voltage capacitance measurements one has to overcome numerous obstacles. In particular CISS (CIES) presents multiple challenges in an on-wafer environment, due to the combination of the extracted gate to source (emitter) and gate to drain (collector) capacitances. In this paper we present the results of on-wafer high voltage measurements performed with a custom made setup. We describe in detail the necessary setup for obtaining highly accurate on-wafer measurements, and compare the results to measurements of packaged devices.