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An impact of process variation on supply voltage dependence of logic path delay variation

机译:工艺变化对逻辑路径延迟变化对电源电压依赖性的影响

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Dynamic Voltage and Frequency Scaling (DVFS) technique requires accurate observation of critical path delay for robust operation under aggressive supply voltage scaling. Logic paths contain several types of logic gates and path delay have voltage dependences because different logic gates have different voltage dependences. However, it is not well investigated that how the voltage dependence of the path delay changes induced by process variation. This paper describes the effect of the process variation on the voltage dependence of path delay. Ring Oscillator circuits fabricated in 65-nm CMOS process are used for the evaluation and analysis of the process variation dependence of the voltage delay curves.
机译:动态电压和频率缩放(DVFS)技术要求准确观察关键路径延迟,以在激进的电源电压缩放下实现稳健的运行。逻辑路径包含几种类型的逻辑门,并且路径延迟具有电压依赖性,因为不同的逻辑门具有不同的电压依赖性。然而,尚未充分研究路径延迟的电压依赖性如何因工艺变化而引起的变化。本文描述了工艺变化对路径延迟的电压依赖性的影响。以65纳米CMOS工艺制造的环形振荡器电路用于评估和分析电压延迟曲线的工艺变化依赖性。

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