Active ESD protection design against cross-power-domain ESD stresses in CMOS integrated circuits

摘要

New active ESD protection design for the interface circuits between separated power domains has been proposed and successfully verified in a 0.13-μm CMOS technology. The HBM and MM ESD robustness of the separated-power-domain interface circuits with the proposed active ESD protection design can achieve over 4 kV and 400 V, respectively.