The Failure Mechanism, Worst Stress Condition for Hot Carrier Injection of NMOS

摘要

Various voltage bias and temperature stress conditions are adopted for hot carrier injection (HCI) test by not only the different device type (N or PMOS) but also the different technology with various device feature sizes (such as W/L=10/0.28μm and 10/0.1μm). Due to different dominant mechanism for hot carrier generation and performance degradation corresponding to various devices, the appropriate stress condition selection is crucial to address the HCI lifetime for device. Based on the conditions that may occur in real application and according to the experimental data, this work discussed the worst stress condition including the voltage and temperature for NMOS device with specific device feature size. Theoretical explanation is presented for each case. An HCI stress condition guideline is summarized in the end.