A 1.5V MULTIRATE MULTIBIT (SIGMA)(DELTA) MODULATOR FOR GSM/WCDMA IN A 90nm DIGITAL CMOS PROCESS

摘要

Multirate multibit Sigma Delta (MM-(SIGMA)(DELTA)) modulator structure is used for low power A/D converter design for wireless applications. New integrator structures and a dedicated timing scheme are proposed for a very low power implementation. A dual-mode second order MM-(SIGMA)(DELTA) modulator targeting GSM/WCDMA applications is designed. In Spice simulations, the prototype design achieves 71.4dB peak Signal-to-Noise+Distortion (SNDR) in the 200kHz GSM band and dissipates 1.1mA of total current from a 1.5V supply. This dualmode design also achieves 45.7dB SNDR in the 1.94MHz WCDMA band with 1.9mA of total current consumption.