基于 FPGA 的 Sigma －Delta 数字调制器设计及验证

摘要

在包含FPGA的系统中，通过使用不包含调制器的Sigma－Delta DAC并将Sigma－Delta数字调制器集成到FPGA中可以提高系统集成度、简化系统设计和降低成本。本文设计了一个五阶一位Sig-ma－Delta数字调制器，详细阐述了调制器的设计步骤以及在FPGA上实现该调制器的方法。设计了相应的硬件电路对调制器性能进行测试，测试结果表明调制器的信噪比超过110dB，总谐波失真低于－122dB，能够满足高精度Sigma－Delta DAC的使用需求。%To improve integration, simplify system design and reduce costs in systems with FPGA′s, Sigma-Delta DACs with no modulator are used and the digital Sigma-Delta modulator is integrated into the FPGAs. This paper introduces the design steps and methods of FPGA implementation in detail by designing a single-bit fifth-order Sigma-Delta digital modulator.Design the hardware circuit to test the modulator performance, the results show that the signal -to-noise ratio ( SNR) is more than 110dB and the total harmonic distortion (THD) is lower than -122dB, to meet the high precision Sigma-Delta DAC requirements.