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An empirical study of quality improvement on SiP assembly issue

机译:SIP组装问题质量改进的实证研究

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This paper provides empirical evidence of fast root cause identification in assembly house for a case in which SiP chip wire bond showed high ratio of quality and reliability escapes. The identification has been performed through FMEA with a large number of RMAs and through quality control to rescreen goods called-back to minimize the field risk by using reliability tests. Furthermore, as a corrective action, authors have been working with major assembly house to implement a set of critical quality gates to improve the quality control in the wire bond process and management.
机译:本文提供了在装配房屋中快速根本原因识别的经验证据,其中SIP芯片线键显示出高比例和可靠性逃逸。通过FMEA通过FMEA进行了识别,通过使用可靠性测试,通过质量控制并通过质量控制来恢复以最小化现场风险。此外,作为一种纠正措施,作者一直在使用主要装配房屋,实施一系列临界质量盖茨,以改善电汇过程和管理中的质量控制。

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