De-embedding Techniques for Passive Components Implemented on a 0.25 μm Digital CMOS Process

摘要

On wafer measurement and characterization of passive components implemented on CMOS technology is one of the initial activities in implementing RF circuits on CMOS. Using test fixtures is necessary in order to test inductors and capacitors at GHz frequencies. However, these fixtures introduce significant effects on measured parameters. This study focuses on the OPEN and THREE step de-embedding techniques used for on wafer measurement of passive devices. different values of inductors and capacitors were used as devices under test (DUT). For each component type, a set of structures for the two de-embedding were fabricated. All of these structures were fabricated on a 0.25 1m Digital CMOS process.