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Effect of the trap density and distribution of the silicon nitride layer on the retention characteristics of charge trap flash memory devices

机译:陷阱密度和氮化硅层的分布对电荷陷阱闪存器件的保持特性的影响

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The trap distribution in the silicon-nitride layer, which was estimated by using experimental results, was used to clarify the retention characteristics of TaN-Al2O3-Si3N4-SiO2-Si (TANOS) memory devices. The dependence of the trap density and distribution of the silicon nitride layer on the retention characteristics in TANOS memory devices was investigated by using the two-coupled rate equations together with the Shockley- Reed statistics. Simulation results showed that the retention characteristics in TANOS memory devices increased with increasing trap density near and above the Fermi-level in the silicon-nitride layer. The simulation results for the retention characteristics of TANOS memory devices were in reasonable agreement with the experimental results. These observations can help improve understanding of the retention mechanisms and the reliability problems in charge trap flash (CTF) memory devices.
机译:通过实验结果估算氮化硅层中的陷阱分布,以阐明TaN-Al 2 O 3 -Si 3 N 4 -SiO 2 -Si(TANOS)存储设备。通过使用双耦合速率方程式和Shockley-Reed统计数据,研究了陷阱密度和氮化硅层分布对TANOS存储器件中保留特性的依赖性。仿真结果表明,随着氮化硅层中费米能级附近和上方陷阱陷阱密度的增加,TANOS存储器件中的保留特性也随之增加。 TANOS存储器件的保留特性的仿真结果与实验结果基本吻合。这些观察结果可以帮助您更好地了解电荷陷阱闪存(CTF)存储设备中的保留机制和可靠性问题。

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