首页> 外文会议>Reliability Physics Symposium Proceedings, 2004. 42nd Annual >Statistical modeling for post-cycling data retention of split-gate flash memories
【24h】

Statistical modeling for post-cycling data retention of split-gate flash memories

机译:统计模型,用于分离门闪存的循环后数据保留

获取原文

摘要

In developing a precise model for post-cycling data retention failure rate of split-gate flash memories, a statistical method is proposed for the extraction of the floating-gate potential from the measured bit-cell-current data. Floating gate charge leakage mechanism during retention of split-gate flash memories is investigated as well. While multiple leakage mechanisms maybe the responsible for the failure bits in stack-gate flash memories, it is found that stress induced leakage current is the major cause for post-cycling data retention failure bits in split-gate flash memories.
机译:在建立精确的分裂门闪存数据循环后数据保存失败率模型时,提出了一种统计方法,用于从测量的位单元电流数据中提取浮栅电势。还研究了在保留分离栅闪存期间的浮栅电荷泄漏机制。尽管可能有多种泄漏机制负责堆叠栅闪存中的故障位,但已发现应力引起的泄漏电流是造成分裂栅闪存中数据循环后数据保留故障位的主要原因。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号