首页> 外文会议>Indium Phosphide and Related Materials, 2004. 16th IPRM. 2004 International Conference on >InP hot electron transistors with reduced emitter width for controllability of collector current by gate bias
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InP hot electron transistors with reduced emitter width for controllability of collector current by gate bias

机译:具有减小的发射极宽度的InP热电子晶体管,可通过栅极偏置控制集电极电流

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InP hot electron transistor with reduced emitter width was fabricated for controllability of collector current by gate bias. In our hot electron transistor, an electron propagates only through an intrinsic semiconductor. To reduce emitter width and remove the leak pass, InP regrowth process for metal gate was eliminated. As a result, the two-terminal emitter-gate current-voltage characteristics showed negative differential resistance and the emitter current passed through the double barrier structure was confirmed. Furthermore gate-collector leakage current could be reduced as a result of reducing gate electrodes area. In common-gate characteristics, linear increase of collector current due to resonant tunneling emitter structure was confirmed.
机译:制作了具有减小的发射极宽度的InP热电子晶体管,以通过栅极偏置来控制集电极电流。在我们的热电子晶体管中,电子仅通过本征半导体传播。为了减小发射极宽度并消除泄漏通道,取消了金属栅极的InP再生工艺。结果,两端发射极-栅极电流-电压特性显示出负的差分电阻,并且确认了通过双势垒结构的发射极电流。此外,由于减小栅电极面积,可以减小栅集电极漏电流。在共栅特性中,证实了由于共振隧穿发射极结构导致的集电极电流线性增加。

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