首页> 外文会议>High Performance Electron Devices for Microwave and Optoelectronic Applications, 2000 8th IEEE International Symposium on >Electrical stress characteristics of MOS capacitors with p-type poly-SiGe and poly-Si gates in the direct tunneling regime
【24h】

Electrical stress characteristics of MOS capacitors with p-type poly-SiGe and poly-Si gates in the direct tunneling regime

机译:具有p型多晶硅栅和多晶硅栅的MOS电容器在直接隧穿条件下的电应力特性

获取原文

摘要

A systematic experimental study on the electrical stress characteristics of MOS capacitors incorporating in-situ B-doped P/sup +/ poly-Si/sub 1-x/Ge/sub x/ material and ultra-thin NO-grown SiO/sub 2/ dielectric (3.0 nm) is presented. Devices with poly-SiGe electrodes showed lower rate of increase in the current-time (I-t) characteristics and more stress tolerance regarding breakdown characteristics. This is consistent with B diffusion properties in both poly-Si and poly-SiGe and it supports the use of poly-SiGe as a promising gate electrode in MOS devices with improved performance.
机译:结合原位B掺杂P / sup + /多晶硅/ sub 1-x / Ge / sub x /材料和超薄NO生长SiO / sub 2的MOS电容器的电应力特性的系统实验研究呈现介电常数(3.0nm)。带有多晶SiGe电极的器件显示出较低的电流时间(I-t)特性增加速率,并且在击穿特性方面具有更大的应力承受能力。这与多晶硅和多晶硅SiGe中的B扩散特性一致,并且它支持将多晶硅SiGe用作具有改善性能的MOS器件中有希望的栅电极。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号