【24h】

Switch-level emulation

机译:开关级仿真

获取原文

摘要

This paper presents a method for the fast emulation of switch-level circuits using FPGAs. In this method, logic gates are used to model switch-level circuits without any abstraction. In contrast to the abstraction methods for which transistors are grouped together to form gates, in this method, gates are grouped together to form the switch models of transistors. Unlike the abstraction methods, the method presented in this paper can emulate many important features of switch-level models, such as bi-directional signal propagation and variations in driving strength. In order to attain a better utilization of FPGA resources a mixed-mode emulation approach has been used. In this approach parts of the circuit are emulated at the switch-level while the rest of the circuit is emulated at the gate-level.
机译:本文提出了一种使用FPGA快速仿真开关级电路的方法。在这种方法中,逻辑门用于对开关级电路进行建模,而无需任何抽象。与将晶体管分组在一起以形成栅极的抽象方法相反,在这种方法中,将栅极分组在一起以形成晶体管的开关模型。与抽象方法不同,本文提出的方法可以模拟开关级模型的许多重要功能,例如双向信号传播和驱动强度变化。为了更好地利用FPGA资源,已经使用了混合模式仿真方法。在这种方法中,电路的一部分在开关级进行仿真,而电路的其余部分在门级进行仿真。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号