首页> 外文会议>Electronic Components and Technology Conference, 1997. Proceedings., 47th >Development of fluxless flip chip bonding to a thin film multichip module substrate
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Development of fluxless flip chip bonding to a thin film multichip module substrate

机译:无助焊剂倒装芯片键合到薄膜多芯片模块基板的开发

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Motorola SPS has developed an assembly process for a three-chip multichip module using a fluxless bonding technique. The substrate is a 25 mm/spl times/25 mm glass that containing two layers of electroplated metallization with vias connecting the two layers and dielectric layer separating them. A test substrate is designed to characterize the continuity and leakage of the assembled modules. One of the chips has two staggered rows of 384 total bumps on the periphery with 80 /spl mu/m pitch and 45 /spl mu/m bump size. The other two chips have three staggered rows, 222 bumps on each chip, 210 /spl mu/m pitch and 100 /spl mu/m bump size. The bump composition is Pb-Sn with low Sn content. All three chips are bonded to the substrate using a fluxless plasma process followed by reflow in a nitrogen furnace. A high precision robot is used for placement and tacking of the chips on the substrate. After the bonding, the chips are underfilled with a proprietary underfill epoxy, and tested for reliability. All the reliability criteria for the specific application of this module have been met. Physical design and assembly process of this multichip module will be presented.
机译:摩托罗拉SPS使用无助焊剂技术开发了三芯片多芯片模块的组装工艺。基板是25 mm / spl times / 25 mm的玻璃,其中包含两层电镀金属镀层,以及连接两层和分离它们的介电层的通孔。设计测试基板以表征已组装模块的连续性和泄漏性。其中一个芯片在外围具有两排交错的384个凸块,间距为80 / spl mu / m,凸块尺寸为45 / spl mu / m。其他两个芯片具有三排交错的行,每个芯片上有222个凸块,间距为210 / spl mu / m,凸块大小为100 / spl mu / m。凸点组成是具有低Sn含量的Pb-Sn。使用无助熔剂等离子体工艺将所有三个芯片粘结到基板,然后在氮气炉中回流。高精度机械手用于将芯片放置和定位在基板上。粘接后,芯片会用专有的底部填充环氧树脂进行底部填充,并进行可靠性测试。已满足该模块特定应用的所有可靠性标准。将介绍该多芯片模块的物理设计和组装过程。

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