Study of gated PNP as an ESD protection device for mixed-voltage and hot-pluggable circuit applications

摘要

The ESD protection results of lateral-gated PNP transistors for various circuit applications are presented. Human body model (HBM) ESD performance was found to depend on the I/O scheme while wafer-level HBNI ESD protection varied from 6.6 kV to 7.6 kV for hot-plug application and mixed-voltage application, respectively.