Multilayer process of T-shaped transistor gates for GaAs-pseudomorphic HEMTs using e-beam resist technology and i-line negative resist with optical ste

摘要

Abstract: A novel process for the fabrication of T-gates (mushroom gates) with a base dimension of 0.2 $mu@m (gate length) and a top dimension of 0.6 $mu@m is presented. We developed a two- layer resist system, in which first the bottom of the gate structure is patterned with a one-layer e-beam resist P(MMA/MAA) and then the top of the structure is patterned with an optical wafer stepper exposure and development of an experimental i-line negative resist (LMB 7011). The crosslinked bottom resist (prebake temperature 170$DGR@C) is exposed with our Leica e-beam system EBPG-5HR. The top resist is patterned with our i-line wafer stepper ASM-L 2500/40. For this exposure we use a rim phase shift reticle to increase the resolution limit of the stepper from 0.7 to 0.5 $mu@m. During exposure of the top resist, there is light reflection from the alloyed ohmic contacts (source and drain electrodes) into the unexposed region of the T-gate. To avoid this effect we use a top antireflective coating (TAR). The thickness and the prebake conditions of this TAR are very important to decrease the swing curve of the i-line negative resist. A comparison between the swing ratio with and without an antireflective coating is given. This additional layer also reduces the exposure dose of the i-line negative resist, which is very useful to get a re-entrant resist profile for the lift-off process of the gate metal. Electrical results on test devices and microwave transistors also are presented. S- parameter measurements, up to 75 GHz, were performed on T-gate transistors with our standard HEMT-structure. !8