首页> 外文会议>Electronic Components and Technology Conference, 1994. Proceedings., 44th >Shrinkage matched cofireable thick film resistors for LTCC
【24h】

Shrinkage matched cofireable thick film resistors for LTCC

机译:适用于LTCC的收缩匹配可燃厚膜电阻器

获取原文

摘要

One of the major advantages of low temperature cofired ceramic (LTCC) technology is the ability to integrate passive components such as resistors, capacitors and inductors into a monolithic package. Due to materials interaction during processing, it is challenging to develop cofirable resistor, capacitor and inductor materials. This paper describes the development of compatible thick film resistors for Ferro's A6 tape system. The shrinkage behavior of the thick film resistors was matched to that of the tape material during firing. This shrinkage matching resulted in a distortion-free fired LTCC package with buried resistors. The resistor formulations were developed with sheet resistance in decade values starting from 10 /spl Omega///spl square/ up to 100 K/spl Omega///spl square/. The electrical properties of the resistors such as sheet resistance, TCR values, ESD stability and voltage handling were studied and found to be good. The microstructure development of the resistor during firing was studied using the scanning electron microscope (SEM). The electrical properties of the buried resistors such as sheet resistance, TCR, drift on ESD, and voltage handling capacity were studied for different buried levels of the resistor from the surface. The effect of firing time and temperatures and package design on the electrical properties of the resistors at different layers was also studied.
机译:低温共烧陶瓷(LTCC)技术的主要优势之一是能够将无源元件(例如电阻器,电容器和电感器)集成到单片封装中。由于加工过程中的材料相互作用,开发可配电阻器,电容器和电感器材料具有挑战性。本文介绍了用于Ferro的A6胶带系统的兼容厚膜电阻器的开发。在烧制过程中,厚膜电阻器的收缩性能与带状材料的收缩性能相匹配。这种收缩匹配导致带有埋入电阻器的无失真点火LTCC封装。开发的电阻器配方的薄层电阻的十进制值从10 / spl Omega /// spl平方/开始到100 K / spl Omega /// spl平方/开始。研究了电阻器的电性能,如薄层电阻,TCR值,ESD稳定性和电压处理能力,发现它们是良好的。使用扫描电子显微镜(SEM)研究了烧制过程中电阻器的微结构发展。针对表面电阻的不同埋入水平,研究了埋入电阻器的电特性,例如薄层电阻,TCR,ESD漂移和电压处理能力。还研究了烧制时间和温度以及封装设计对电阻在不同层的电学性能的影响。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号