SASPL: a test program productivity analysis tool

摘要

SASPL, a test program statistical analysis simulator for analyzing existing test programs to increase productivity, is presented. This method was created in a way that would allow it to be integrated into an existing CAE/CAM (computer-aided engineering and manufacturing) environment. The authors describe SASPL, together with results obtained through its use on a variety of production telecommunication (mixed analog and digital) circuits. SASPL targets reducing the production test overhead, by identifying the production test's inefficiencies, for devices having working test programs and for which there is probably no intention of redesign (in order to take advantage of test time reduction through design for test methods). It is hoped that this information, when fed back to the test engineer, will allow future test programs to be more efficient when first written.