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Molded Interconnect Substrate (MIS) Technology for Semiconductor Packages

机译:半导体封装的模制互连基板(MIS)技术

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This paper provides a comprehensive treatment on the performance characteristics of Molded Interconnect Substrate (MIS) technology, which has been deemed a highly effective solution to small and reliable semiconductor packages tailored for applications including but not limited to Power Management, RF Frontend, Edge-AI/Computing, and Automotive. This paper is organized as follows: Upon Introduction, a practical treatment on key performance characteristics of MIS technology is provided. The respective processes of implementing one-layer and multiple-layer MIS package designs are described, and the corresponding challenges and performance/cost implications are presented. After that, production-proven package examples implemented with MIS technology are reported, demonstrating the versatility of this semiconductor technology. The last section of this paper explores potential usages of MIS technology for, e.g. Package-on-Package.
机译:本文针对模制互连基板(MIS)技术的性能特征提供了全面的处理方法,该技术被认为是为满足以下应用而量身定制的小型可靠半导体封装的高效解决方案,这些应用包括但不限于电源管理,RF前端,Edge-AI /计算和汽车。本文的组织结构如下:引言之后,提供了有关MIS技术的关键性能特征的实际处理方法。描述了实现一层和多层MIS封装设计的各个过程,并提出了相应的挑战和性能/成本影响。之后,报告了使用MIS技术实现的经过生产验证的封装示例,证明了该半导体技术的多功能性。本文的最后一部分探讨了MIS技术在以下方面的潜在用途:层叠包装。

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