Design of DPWM with high resolution under 80 ps using low-cost Xilinx FPGA

摘要

There is an interest in industry to miniaturize the power converters, and increasing the switching frequency yields to a reduced sized of the reactive components and thus to a smaller size of the circuit. However, this increased switching frequency has resulted in the need for digital pulse width modulators (DPWM) with high resolution to improve the performance of the control circuit. When the switching frequency increases, the requirement of a very high-performance DPWMs is necessary because DPWMs resolution is limited. This work presents and compares two architectures of hybrid DPWM where the finest resolution is achieved using standard logic components of vendor’s libraries. The main advantages of the proposal are that the implementation does not require any placement and routing effort and the resolution is very high (80 ps) even when implemented in a low- cost Xilinx Artix-7 FPGA.