首页> 外文会议>Symposium on Microelectronics Technology and Devices >Impact of the Octagonal Layout Style for MOSFETs using 180nm Bulk CMOS ICs Technology Node
【24h】

Impact of the Octagonal Layout Style for MOSFETs using 180nm Bulk CMOS ICs Technology Node

机译:八边形布局样式对使用180nm块状CMOS IC技术节点的MOSFET的影响

获取原文

摘要

This paper aims to evaluate the impact of the octagonal layout style for MOSFETs regarding the 180nm Bulk CMOS ICs technology node. The main results of this study show that the nMOSFETs with octagonal gate geometries are capable of improving the drain current, Early voltage, intrinsic voltage gain, and on-state drain to source resistance about 150%, 800%, 66% and 50%, respectively, in relation to the standard rectangular MOSFET counterparts, regarding the same bias conditions. Therefore, the LCE and PAMDLE effects continue being actives regarding this 180 nm Bulk CMOS ICs technology node.
机译:本文旨在评估八边形布局样式对MOSFET对180nm Bulk CMOS ICs技术节点的影响。这项研究的主要结果表明,具有八边形栅极几何形状的nMOSFET能够将漏极电流,早期电压,本征电压增益以及导通状态下的漏源电阻提高150%,800%,66%和50%,对于相同的偏置条件,分别与标准矩形MOSFET相对。因此,关于此180 nm体CMOS IC技术节点,LCE和PAMDLE效应继续有效。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号