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Effects of uniaxial strain on gate capacitance and threshold voltage of double gate junctionless transistor

机译:单轴应变对双栅无结晶体管栅极电容和阈值电压的影响

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This work looks into the effects of uniaxial strain on the Silicon substrate of a Double Gate Junctionless Transistor (DGJLT) in terms of gate capacitance and threshold voltage extracted from Capacitance-Voltage (C- V) characteristics. The C- V curves had been obtained using a ID self consistent Schrodinger-Poisson solver incorporating wave function penetration effects. The contributions of effective mass variation and energy band splitting due to uniaxial strain had been incorporated in the simulation model. Thus the dependence of C- V characteristics on variation of strain levels had been revealed for up to 5 GPa. The effects of changes in channel thickness and doping density on C- V curves under uniaxial strain had also been studied. Finally, the threshold voltage variation with applied strain was observed.
机译:这项工作从栅电容和从电容-电压(C-V)特性中提取的阈值电压的角度,研究了单轴应变对双栅无结晶体管(DGJLT)的硅衬底的影响。使用结合了波函数穿透效应的ID自洽Schrodinger-Poisson求解器获得了C-V曲线。有效质量变化和单轴应变引起的能带分裂的贡献已被纳入到仿真模型中。因此,已经揭示了高达5 GPa的C- V特性对应变水平变化的依赖性。还研究了沟道厚度和掺杂密度的变化对单轴应变下C-V曲线的影响。最后,观察到阈值电压随施加的应变而变化。

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