20nm FinFET-based SRAM cell: Impact of variability and design choices on performance characteristics

摘要

The relentless scaling of semiconductor technology has resulted in dramatic performance improvements of Integrated Circuits (ICs). However, traditional planar CMOS technology seems to have reached its limit. To continue with Moore's law, FinFET technology has shown to be a viable solution. Process variations are still relevant, however. Therefore, it is crucial to study their impact on circuit performance. This paper explores design choices for 20nm FinFET-based SRAM cells and analyzes the impact of process variations on the performance characteristics of the SRAM cell.