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Design of voltage comparator integrated circuit with normally-on MESFETs on 4H-SiC semiconductor

机译:在4H-SiC半导体上具有常导MESFET的电压比较器集成电路的设计

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This paper continues our previous works about the integrated circuits development on the 4H-SiC semiconductor, based on finger gate MESFETs. It describes a comparator designed exclusively with normally-on MESFETs and epitaxial resistors. For this novel circuit design we have used the SPICE models previously extracted from devices further used for fabrication of functional complex analog and digital circuitry (thermally compensated analog voltage reference, basic logic gate and various flip-flops).The schematic is presented in detail from the block schematic to the transistor level. The comparator waveforms and the time delays are presented for zero, positive and negative reference levels both at RT and 250°C. The Comparator circuit was successfully simulated using sinusoidal and triangular signals at 100 kHz and 200 kHz. However, the presented waveforms are only for 100 kHz sinusoidal signal.
机译:本文继续了我们先前基于指栅MESFET在4H-SiC半导体上进行集成电路开发的工作。它描述了专门设计为具有常通MESFET和外延电阻的比较器。对于这种新颖的电路设计,我们使用了先前从进一步用于制造功能复杂的模拟和数字电路(热补偿的模拟电压基准,基本逻辑门和各种触发器)的器件中提取的SPICE模型。该模块原理图为晶体管级。给出了RT和250°C时零,正和负参考电平的比较器波形和时间延迟。比较器电路已成功使用100 kHz和200 kHz的正弦和三角信号进行了仿真。但是,显示的波形仅适用于100 kHz正弦信号。

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