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A Low Dropout Linear Regulator with High Power Supply Rejection

机译:具有高电源抑制的低压丢失线性稳压器

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摘要

Combining the supply ripple subtraction and high-pass filtering can improve the power supply rejection (PSR) over wideband frequency of low dropout regulator (LDO). The proposed LDO is fabricated by TSMC 0.35μm 2-poly 4-metal CMOS process. The simulation results at maximum load current of 100mA, show that PSR at 10k, 100k and 1M are -72dB, -75dB and -46dB, respectively. Therefore, it's well suited for switching pre-regulator and SoC applications. The active area of this LDO is 300×360μm~2.
机译:组合电源纹波减法和高通滤波可以通过宽带频率(LDO)来改善电源抑制(PSR)。所提出的LDO由TSMC0.35μm2-聚4-金属CMOS工艺制造。仿真导致最大负载电流为100mA,显示PSR在10K,100K和1M时分别为-72dB,-75dB和-46dB。因此,它非常适合切换预调节器和SOC应用。该LDO的有源区为300×360μm〜2。

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