首页> 外文会议>IEEE Workshop on control and modeling for power electronics >Full FPGA-based design of a PWM/CPM controller with integrated high-resolution fast ADC and DPWM peripherals
【24h】

Full FPGA-based design of a PWM/CPM controller with integrated high-resolution fast ADC and DPWM peripherals

机译:基于FPGA的PWM / CPM控制器的完整设计,具有集成的高分辨率快速ADC和DPWM外设

获取原文

摘要

This paper introduces the design and implementation of a full FPGA oriented PWM/CPM controller. The controller realization has been enabled by newly developed ADC and high-resolution DPWM peripheral units based on delay line technology that has been specially modified to FPGA design and constrains. The new ADC is capable of converting a sample with resolution of 10 bits within 300ns. The DPWM has demonstrated capability of producing 11bit signal at 1.6MHz. CPM operation is verified on a 12–48V, 100W boost converter.
机译:本文介绍了面向FPGA的完整PWM / CPM控制器的设计和实现。新开发的ADC和基于延迟线技术的高分辨率DPWM外围单元已经实现了控制器的实现,该延迟线技术已针对FPGA设计和约束进行了专门修改。新的ADC能够在300ns内转换10位分辨率的样本。 DPWM具有在1.6MHz频率下产生11位信号的能力。 CPM工作在12–48V,100W升压转换器上进行了验证。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号