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20 Minimal Majority Gate Mapping of Four-Variable Functions for Quantum-Dot Cellular Automata

机译:用于量子点蜂窝自动机的四变量函数的20最小多种栅极映射

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Complementary metal–oxide–semiconductor (CMOS) scaling faces many serious difficulties due to the approaching fundamental device physics limits. The quantum effects will dominate the device performance as the dimension approaches the sub-10 nm range due to an increase in the gate leakage current, as well as in capacitive coupling, doping, and lithography fluctuations [1]. Many technologies are proposed for the replacement of CMOS technology, such as quantum-dot cellular automata (QCA) [2–4], single electron tunneling (SET) [5], and tunneling phase logic (TPL) [6]. QCA, one of the viable technologies for the implementation of future digital systems, will be the focus of this chapter. QCA technology has excellent features for nanoelectronic integrated circuit implementations, such as extremely high packing densities (10~(12) devices/cm~2), simple interconnections, small signal delays, and low-power consumption. The basic circuit unit for QCA circuits is a three-input majority gate. In addition to developing logic circuits, QCA are also used to create interconnects. Thus, large QCA digital circuit architectures can be built using simple structures such as wires, majority gates, and inverters. The focus of this chapter is to present logic synthesis approaches for QCA applications based on majority gates.
机译:互补金属 - 氧化物半导体(CMOS)缩放面向近摄的基本设备物理限制,面临许多严重困难。由于栅极漏电流的增加,量子效应将使尺寸接近Sub-10 NM范围,以及电容耦合,掺杂和光刻波动[1]。提出了替代CMOS技术的许多技术,例如量子点蜂窝自动机(QCA)[2-4],单电子隧道(设定)[5]和隧道相位逻辑(TPL)[6]。 QCA是实现未来数字系统的可行技术之一,将成为本章的重点。 QCA技术具有优异的纳米电子集成电路实现特征,例如极高的填充密度(10〜(12)个器件/ cm〜2),简单的互连,信号延迟小,信号延迟和低功耗。用于QCA电路的基本电路单元是三输入多数门。除了开发逻辑电路外,QCA还用于创建互连。因此,可以使用诸如电线,多数门和逆变器的简单结构构建大型QCA数字电路架构。本章的重点是基于多数门的QCA应用呈现逻辑合成方法。

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