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Wafer Level Solder Bumping and Flip Chip Assembly with Solder Balls Down to 30μm

机译:晶圆级焊锡凸点和倒装芯片组件,焊球低至30μm

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The most important technology driver in the electronics industry is miniaturization mainly driven by sizereduction on wafer level and cost. One of the interconnection technologies for fine pitch applications with thepotential for highest integration and cost savings is Flip Chip technology. The commonly used method ofgenerating fine pitch solder bumps is by electroplating the solder. This process is difficult to control or evenimpossible if it comes to ternary or quaternary alloys. The work described in this study addresses the limitationsof existing bumping technologies by enabling low-cost, fine pitch bumping and the use of a very large variety ofsolder alloys. This flexibility in the selection of the solder materials and UBM stacks is a large advantage if it isessential to improve temperature cycling resistance, drop test resistance, or to increase electromigration lifetime.The technology allows rapid changeover between different low melting solder alloys. Tighter bump pitches anda better bump quality (no flux entrapment) are achievable than with screen printing of solder paste. Because nosolder material is wasted, the material costs for precious metal alloys like Au80Sn20 are much lower than withother bumping processes. Solder bumps with a diameter between to date 30 μm and 500 μm as well as smalland large batches can be manufactured with one cost efficient process.To explore this potential, cost-efficient solder bumping and automated assembly technologies for the processingof Flip Chips have been developed and qualified. Flip Chips used in this study are 10 mm by 10 mm in size,have a pitch of 100 μm and a solder ball diameter of 30 μm, 40 μm or 50μm, respectively.Wafer level solder application has been done using wafer level solder sphere transfer process or solder spherejetting technology, respectively. The latter tool has been used for many years in the wafer level packagingindustry for both Flip Chip and chip scale packaging applications. It is commonly known in the industry as asolder ball bumping equipment. For the described work the process was scaled down for processing solderspheres with a diameter of 30 μm what was never done before that way worldwide.The research has shown that the underfill process is one of the most crucial factors when it comes to Flip Chipminiaturization for high reliability applications. Therefore, high performance underfill material was qualifiedinitially [1].Final long term reliability testing has been done according to MIL-STD883G, method 1010.8, condition B up tothirteen thousand cycles with excellent performance of the highly miniaturized solder joints. SEM/EDX andother analysis techniques will be presented. Additionally, an analysis of the failure mechanism will be given andrecommendations for key applications and further miniaturization will be outlined.
机译:电子行业最重要的技术驱动因素是小型化,这主要是由尺寸决定的。 降低晶圆水平和成本。一种用于细间距应用的互连技术,其中包括 倒装芯片技术是实现最高集成度和节省成本的潜力。常用的方法 通过电镀焊料产生细间距的焊料凸点。这个过程很难控制甚至 如果涉及三元或四元合金,则是不可能的。本研究中描述的工作解决了局限性 通过实现低成本,小间距的碰撞以及使用多种不同的 焊料合金。如果是这样,那么在选择焊料材料和UBM叠层时的这种灵活性是一个很大的优势。 对于提高温度循环电阻,耐跌落测试电阻或延长电迁移寿命至关重要。 该技术可以在不同的低熔点焊料合金之间快速转换。更紧密的颠簸间距和 与丝网印刷焊膏相比,可以获得更好的凸点质量(没有助焊剂夹带)。因为没有 焊锡材料被浪费掉了,像Au80Sn20这样的贵金属合金的材料成本大大低于 其他碰撞过程。直径在30μm至500μm之间的焊料凸块以及较小的焊料凸块 大批量生产可以通过一种经济高效的方法进行。 探索这种潜在的,具有成本效益的焊料凸点和自动装配技术,以进行加工 倒装芯片已开发并合格。本研究中使用的倒装芯片尺寸为10毫米乘10毫米, 间距分别为100μm和焊球直径分别为30μm,40μm或50μm。 晶圆级焊料的应用已使用晶圆级焊料球转移工艺或焊料球完成 喷射技术。后一种工具已经在晶圆级包装中使用了很多年。 倒装芯片和芯片级封装应用的工业。在业界通常称为 焊球撞击设备。对于所描述的工作,按比例缩小了处理焊料的过程 直径为30μm的球体,这在世界范围内是前所未有的。 研究表明,对于倒装芯片,底部填充工艺是最关键的因素之一 小型化的高可靠性应用。因此,高性能的底部填充材料是合格的 最初[1]。 根据MIL-STD883G,方法1010.8,条件B进行了最终的长期可靠性测试,直至 一万三千次循环,具有高度微型化焊点的出色性能。 SEM / EDX和 将介绍其他分析技术。此外,将对故障机理进行分析,并 将概述关键应用的建议和进一步的小型化。

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