This paper describes an asymmetric single-ended 6T SRAM bitcell that improves both Read Static Noise Margin (RSNM) and Write Noise Margin (WNM) for the same bitcell area as a conventional symmetric 6T. This improvement is achieved using a single VDD, without employing assist techniques that require multiple voltages. The improvement in noise margins significantly improves the low-voltage robustness and consequently the minimum operating voltage of the SRAM (VMIN). Single-ended write is accomplished in two phases using dual word-lines. Finally, we propose a differential sensing scheme using a weak reference cell to read the single-ended 6T. A combination of reduced bitline capacitance and increased drive current ensure read delay comparable to conventional differential sensing, for the same bitcell area.
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机译：本文介绍了一种非对称单端6T SRAM位单元，该位单元在与传统的对称6T相同的位单元区域上提高了读静态噪声容限（RSNM）和写噪声容限（WNM）。使用单个V DD 即可实现这种改进，而无需采用需要多个电压的辅助技术。噪声容限的改善显着提高了低压鲁棒性，从而提高了SRAM的最低工作电压（V MIN ）。使用双字线分两个阶段完成单端写入。最后，我们提出了一种使用弱参考单元读取单端6T的差分传感方案。对于相同的位单元面积，降低的位线电容和增加的驱动电流的组合可确保获得与传统差分感应相当的读取延迟。
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