Ultra-Thin 3D Package Development and Qualification Testing

摘要

The motivation for developing higher density IC packaging continues to be the personal entertainment and the portable handset markets. Consumers' expectations are that each new generation of products be smaller, thinner, lighter in weight and furnish greater functionality. The challenge electronic manufacturers face when competing in the global marketplace is to offer a product that will meet all functional and performance expectations without increasing product cost. To address the need for more functionality without increasing product size, a number of companies have adapted various forms of multiple die 3D packaging. A majority of these early, multiple function devices relied on the sequential stacking of die elements onto a single substrate interposer using a conventional wire-bond process. Because the wire-bonding of multiple tiers of uncased die is rather specialized and the die used may have had relatively poor wafer-level yields, overall manufacturing yield of the stacked-die packaged devices have not always met acceptable levels. The information presented in this paper focuses on the stringent qualification requirements for a very-thin, vertically configure duPILR package developed for high-volume memory and mixed function products. A key advantage of this innovative package-on-package (PoP) configuration is that each layer of the package can be pre-tested before joining. This capability greatly improves the overall manufacturing yield and the functionality of the final package assembly is assured. The material developed for this program will outline current environmental expectations for multiple function packaging for hand-held and portable electronic applications and detail the qualification test results for a number of memory variations using this unique, vertically-stacked package technology.