Modeling and Simulation of a Large Integrated Circuit Package

摘要

We present the first full-wave simulation of a complete computer chip package. The difficulties encountered and the solutions found in the geometrical modeling phase are described. The method of choice for the simulation is the Finite Integration Technique in the time domain. The handling of the highly complex package geometry and of the huge amount of unknowns arising in the discretization is made possible by the use of massive parallelization. The latter employs an optimally balanced parallel decomposition technique. Simulation results for this device including signal delay times and cross-talk couplings are presented.