EFFECTS OF PLASMA PRETREATMENT ON FLIP CHIP AND CSP SUBSTRATE LEVEL ASSEMBLY YIELD AND RELIABILITY

摘要

A comprehensive study is performed investigating the influence of plasma pretreatment on assembly yield for solder flip chip in package assemblies and chip scale package (CSP) assembly to SIP modules. In addition, a detailed reliability screening is performed on the assemblies to assess the impact of pre assembly plasma treatment on long term reliability of the assemblies. Various plasma treatment techniques and two substrate surface finishes are included in the experimental analysis. The flip chip and CSP devices are underfilled with fast flow, snap cure underfill material. Baseline assemblies without plasma pretreatment are tested for comparison. The test vehicles are subjected to liquid to liquid thermal shock or air to air thermal cycle testing and analyzed using electrical test, CSAM, X-ray, and microsectioning. Visual inspection of the plasma treated samples revealed higher more uniform fillet shapes especially in the corners of the components compared with the untreated devices. CSAM analysis indicated no significant difference between the plasma treated and non-plasma treated samples in terms of underfill uniformity and void formation during processing. The flow times for the plasma treated flip chip samples were 12 to 20 percent faster than the non-plasma treated samples. The flow times for the plasma treated CSPs were 55% faster than the flow times for the untreated samples. As for flip chip reliability differences, the plasma treated test vehicles with Au finish had the highest reliability with a 70 improvement over untreated samples. In contrast, the untreated flip chip assemblies with an OSP finish had 78% higher reliability compared with the plasma treated counterpoints. For the CSP components, the reliability of the components were generally the same as the non-Plasma treated samples.