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Modelling reliability of flip chip on board assemblies implementing a correction function approach comparing analytical and finite element techniques

机译:实施校正功能方法的倒装芯片板上组件的可靠性建模,比较分析和有限元技术

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To determine the reliability performance of electronic components, environmental tests, or accelerated life tests, are used to apply stresses to electronic packages that exceed the stress levels experienced in the filed. In theory, these elevated stress levels are used to generate the same failure mechanisms that are found in the field, only at an accelerated rate. Therefore, an acceleration factor is typically used to correlate (extrapolate) the accelerated life testing data to a field failure rate for a specified use condition. Often times this data is time consuming and expensive to obtain , hence a need exists for reducing the time to data for electronic components in reliability testing. A methodology is presented whereby existing reliability data can be leveraged to obtain" correction functions' which can be used to modify a mean time to failure, MTTF, estimated analytically or numerically. A suggested analytical model is presented in addition to the statistics based methodology that can be used obtain correction functions. The correction function approach is similar to approaches used for modifying fatigues strengths in engineering alloys. Fatigue strengths or endurance limits are modified to account for physical differences between the actual parts in that were used to obtain the fatigue data. The methodology presented allows for the use of numerous correction functions to adjust estimated life times of component level assemblies based on key correction factors that account for effects difficult or impractical to incorporate in the base prediction models. The methodology is effective in that it can leverage the utility of the life prediction enabled by finite element modelling. The potential correction factors are presented in a fishbone diagram accounting for effects such as substrate metallization, underfill delamination, solder joint voids, underfill voids, intermetallic thickness, etc. Using existing reliability data, the correction functions are determined via multiple linear regression analysis. To illustrate the utility of the life prediction methodology, a case study is presented for flip chip on board assemblies. The uncorrected fatigue life of the solder interconnects is estimated using a trilayer stack analytical model predicting plastic strain and incorporating correction functions for the glass transition temperature of the underfill, an area ratio for the solder joint interconnect pads, and the substrate bond pad metallization.
机译:为了确定电子组件的可靠性性能,可以使用环境测试或加速寿命测试对电子封装施加超过应用领域中所承受的应力水平的应力。从理论上讲,这些升高的应力水平仅在加速时才用于产生与现场相同的失效机制。因此,通常使用加速因子将加速寿命测试数据与指定使用条件下的现场故障率相关(外推)。通常,获取这些数据既耗时又昂贵,因此需要在可靠性测试中减少获取电子零件数据的时间。提出了一种方法,可以利用现有的可靠性数据来获得“校正函数”,该函数可用于修改分析或数值估计的平均故障时间MTTF。除基于统计的方法外,还提出了一种建议的分析模型,该方法可以使用修正函数方法来修正工程合金的疲劳强度,修正疲劳强度或耐久极限以解决实际零件之间的物理差异,以获取疲劳数据。提出的方法可以使用多种校正函数,根据关键校正因子来调整组件级组件的估计使用寿命,这些关键校正因子说明了难以或不切实际地将其纳入基本预测模型中的影响。通过有限元素实现寿命预测的效用t建模。可能的校正因子显示在鱼骨图中,说明了诸如衬底金属化,底部填充脱层,焊点空隙,底部填充空隙,金属间厚度等影响。使用现有的可靠性数据,可通过多元线性回归分析来确定校正函数。为了说明寿命预测方法的实用性,本文针对倒装板上装配进行了案例研究。焊料互连的未校正疲劳寿命是使用三层堆栈分析模型估算的,该模型预测塑性应变,并结合了底部填充材料的玻璃化转变温度,焊点互连焊盘的面积比和衬底接合焊盘金属化的校正函数。

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