Numerical Simulation of Underfill Cure Evolution in Chip-Scale-Package (CSP) Manufacturing Process

摘要

In direct-chip-attachment (DCA) a chip is mounted directly to a substrate using a grid-array of solder bumps. In order to minimize the thermal stress, it is necessary to use underfill encapsulants to improve the reliability of flip-chip solder joint interconnections. By applying an underfill encapsulant into the gap between the 1C chip and the substrate, the stress on the solder joints during each temperature excursion can be uniformly dispersed throughout the encapsulated module, leading to an enhanced improvement of the reliability. In addition, underfilling a flip chip assembly can also provide an environmental protection against corrosion of the ICs. In an actual manufacturing process establishing efficient during of the underfill is of paramount importance, as it is directly linked to the fatigue reliability of the part. Unfortunately, there are a number of parameters, such as, curing kinetics of underfill resin, temperature profile in re/low oven, solder bump temperature, and solder bump patterns that interact with each other in determining the degree of cure. This paper gives an overview of a numerical software package developed to address this critical issue of predicting the degree of cure of underfill during an actual manufacturing process, along with some case studies. This software package is intended to serve as a design tool, which would facilitate the process engineer to adjust the parameters mentioned above to obtain the desired degree of cure for a reliable package.