Impact on wafer process of sub-120nm design rule mask

摘要

Optical lithography makes various problems in the low k_1 range due to high MEF and low process margin. This has an impact upon CD variation, pattern collapse, pattern thinning, and undesirable repeating defect throughout the wafer process. Moreover, it is difficult to understand main factor that affected process problems. In this paper, mainly we study impacts on wafer process using 120nm design rule mask. Experimentally, we use full field mask composed of DRAM structure with cell array and periphery patterns. 0.70 NA KrF exposure tool and APSM are used to get high process margin and good pattern fidelity. As a result, we got about 10% EL and 0.5um DOF or more in actual process. Also CD variation was controlled within 15nm using CMP and BARC. However, mask CD variation was amplified on wafer, especially wafer CD variation was very serious in the edge of cell array by optical proximity effect, stand wave effect, and mask. Patterning and etching process occurred line thinning, and it was inspected as repeating defect. To get optimum process result, it was very important to control mask CD and wafer CD within process window after mask CD correlation. We could find that mask or wafer process have an influence on unexpected problem for 120nm process with low k_1 value.