CORRELATION OF SOLDER JOINT RELIABILITY OF μPGA SOCKET TO PACKAGE FLATNESS AND PCB WARPAGE PHASE I-PCB WARPAGE UNDER THERMAL REFLOW BY MOIRE EMULATION AND FEM SIMULATION

摘要

As an extension of the previous research on Reliability of Micro Ball Grid Array Socket and interconnect solder joint, the current study focuses on deriving solder joint reliability correlation to package flatness and PCB warpage. In Phase I of this project, a test vehicle with advanced testability features was designed to enable an extensive reliability study on the μPGA socket - compliance pin -solder ball - PCB system. Shadow Moire Interferometry was conducted on the test vehicle, with paticular attention on the μPGA socket site, as well as on the top of μPGA socket, to assess the PCB warpage and package flatness under the emulated reflow process. Then an FEM model was created with variations of stack-up, layer count and copper foil thickness, to simulate the PCB warpage under similar reflow cycles. Finally, the trend of the data from Moire emulation and FEM simulation were benchmarked. The relationship of mechanical strengthening mechanism of eutectic quasi-laminate or rod-like α and β phases formation and stretched crack path were correlated to the FEM simulated cooling rate and peak reflow temperature In Phase Ⅱ, the correlation of solder joint reliability of uPGA socket to PCB warpage and socket flatness as a future study is reported. In Phase Ⅲ, the methodology to established the residual stress under mechanical bending to the reliability scale is proposed. Field mechanical stress will be monitored and FEM modeling will be conducted to assess and infer beyond the limitation of instrumentation.